common clk framework · Maintained

Maintainers

• M Michael Turquette <mturquette@baylibre.com>
• M Stephen Boyd <sboyd@kernel.org>
• R Brian Masney <bmasney@redhat.com>

Paths

• F Documentation/devicetree/bindings/clock/
• F drivers/clk/
• F include/dt-bindings/clock/
• F include/linux/clk-pr*
• F include/linux/clk/
• F include/linux/of_clk.h
• F scripts/gdb/linux/clk.py
• F rust/helpers/clk.c
• F rust/kernel/clk.rs
• X drivers/clk/clkdev.c

Last 30 days

Recent patches

Most-recent 30 patches in this subsystem on linux-staging (capped at 30), ordered by date desc.

• STALE156d REVIEWED: 1 (1M) [PATCH v5 03/23] clk: tegra30: add CSI pad clock gates
  2025-10-22 · Svyatoslav Ryhel <hidden>
• STALE156d REVIEWED: 1 (0M) [PATCH v5 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
  2025-10-22 · Svyatoslav Ryhel <hidden>
• STALE156d REVIEWED: 1 (1M) [PATCH v5 01/23] clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114
  2025-10-22 · Svyatoslav Ryhel <hidden>
• STALE245d REVIEWED: 1 (1M) [PATCH v4 04/24] clk: tegra30: add CSI pad clock gates
  2025-10-08 · Svyatoslav Ryhel <hidden>
• STALE245d REVIEWED: 1 (0M) [PATCH v4 03/24] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
  2025-10-08 · Svyatoslav Ryhel <hidden>
• STALE245d [PATCH v4 02/24] clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114
  2025-10-08 · Svyatoslav Ryhel <hidden>
• STALE257d REVIEWED: 1 (1M) [PATCH v3 03/22] clk: tegra30: add CSI pad clock gates
  2025-09-25 · Svyatoslav Ryhel <hidden>
• STALE257d REVIEWED: 1 (0M) [PATCH v3 02/22] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
  2025-09-25 · Svyatoslav Ryhel <hidden>
• STALE257d [PATCH v3 01/22] clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114
  2025-09-25 · Svyatoslav Ryhel <hidden>
• STALE270d [PATCH v2 03/23] clk: tegra30: add CSI pad clock gates
  2025-09-06 · Svyatoslav Ryhel <hidden>
• STALE270d [PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
  2025-09-06 · Svyatoslav Ryhel <hidden>
• STALE270d [PATCH v2 01/23] clk: tegra: set CSUS as vi_sensors gate for Tegra20, Tegra30 and Tegra114
  2025-09-06 · Svyatoslav Ryhel <hidden>
• STALE286d [PATCH v1 03/19] clk: tegra30: add CSI PAD clock gates
  2025-08-19 · Svyatoslav Ryhel <hidden>
• STALE286d [PATCH v1 02/19] dt-bindings: clock: tegra20: Add IDs for CSI PAD clocks
  2025-08-19 · Svyatoslav Ryhel <hidden>
• STALE286d [PATCH v1 01/19] clk: tegra: init CSUS clock for Tegra20 and Tegra30
  2025-08-19 · Svyatoslav Ryhel <hidden>
• STALE740d [PATCH v1 1/1] treewide: Align match_string() with sysfs_match_string()
  2024-06-03 · Andy Shevchenko <andriy.shevchenko@linux.intel.com>
• STALE1411d [PATCH 6/6] i2c: Make remove callback return void
  2022-06-28 · Uwe Kleine-König <hidden>
• DORMANTno replies LANDED: 12 (12M) [PATCH v9 1/2] dt-bindings: clock: mediatek,mt7621-sysc: add '#reset-cells' property
  2022-02-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1593d LANDED: 13 (13M) [PATCH v9 2/2] clk: ralink: make system controller node a reset provider
  2022-02-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1560d [PATCH v2 03/66] clk: sunxi-ng: v3s: Export the MBUS clock to the public header
  2022-02-05 · Paul Kocialkowski <hidden>
• STALE1573d LANDED [PATCH 5/5] spi: make remove callback a void function
  2022-01-23 · Uwe Kleine-König <hidden>
• STALE1593d [PATCH v8 3/4] clk: ralink: make system controller node a reset provider
  2022-01-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1593d REVIEWED: 7 (7M) [PATCH v8 2/4] dt-bindings: clock: mediatek,mt7621-sysc: add '#reset-cells' property
  2022-01-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1624d [PATCH v7 3/4] clk: ralink: make system controller node a reset provider
  2022-01-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1624d REVIEWED: 7 (7M) [PATCH v7 2/4] dt-bindings: clock: mediatek,mt7621-sysc: add '#reset-cells' property
  2022-01-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1624d REVIEWED: 7 (7M) [PATCH v6 2/4] dt-bindings: clock: mediatek,mt7621-sysc: add '#reset-cells' property
  2022-01-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1624d [PATCH v6 3/4] clk: ralink: make system controller node a reset provider
  2022-01-10 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1624d [PATCH v5 3/4] clk: ralink: make system controller node a reset provider
  2021-11-07 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1624d REVIEWED: 7 (7M) [PATCH v5 2/4] dt-bindings: clock: mediatek,mt7621-sysc: add '#reset-cells' property
  2021-11-07 · Sergio Paracuellos <sergio.paracuellos@gmail.com>
• STALE1696d [PATCH v4 3/4] clk: ralink: make system controller node a reset provider
  2021-10-30 · Sergio Paracuellos <sergio.paracuellos@gmail.com>